Describe a board. Get one you can argue with.
TestCoupon turns a written description into a block diagram you correct, picks a part for each block with every candidate checked by code, and solves the parts around it from that chip’s own datasheet, page cited. Then it checks the board and tells you what it could not check.
- equation
- VOUT = VREF (1 + R2/R1) + IADJ·R2
- R1
- 124 Ω
- page 3
- VREF
- 1.25 V
- page 4
- IADJ
- 60 µA
- page 4
- R2
- 202.16 Ω
- solved by code
- nearest
- 200 Ω, E96, 1%, 0603
- buy
- RMCF0603FT200R
- in stock
That is one value from a real run. Every value on the bill of materials carries its equation, its constants and the datasheet page they came from, so checking it takes a minute instead of trust.
A language model finds the equation and reads the constants off the page. It does not do the arithmetic and does not choose which value to solve for. Code does both, so the same datasheet gives the same resistor every time.
How it works
Two halves, in the order you meet them: first it generates, then it verifies. Each step refuses to run until the one before it holds up. That refusal is the product. The second half also stands on its own: it takes a KiCad revision you already have.
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Generation
Say what you are building, in a sentence
“A soil moisture sensor for a garden bed, two AA batteries, has to last the whole season.” What comes back is a block diagram and a draft spec: every value tagged with where it came from, and everything the model could not support marked as a guess rather than quietly presented as an answer. It also lists what it should have asked you and did not.
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Argue with it until it is right
“You never said how often it wakes up, and at once a minute the batteries are gone in a week.” It revises and tries again, for as many rounds as you want. Every round is kept, so the wrong first draft survives next to the corrected one and the reasoning is recoverable later.
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Parts are chosen one block at a time, by code
One catalog search per block. Every candidate is checked against the block’s requirements by code, a tick or a cross per requirement and the reason for every cross. The passives around the chosen chip are solved from that chip’s own datasheet, not from a typical circuit. What comes out is a bill of materials with the source of every value on it.
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Verification
Then it checks the board, and says what it skipped
Upload a KiCad revision. The checks are deterministic: spec gates G0 to G2, KiCad’s own electrical and design rule checks, house rules for what those two do not look at, and each part that ships a pin map compared against the pin table in its manufacturer’s datasheet, with the parts that could not be compared named in the report. Every finding is tied to a part, a net and a position on the board. Alongside the findings: what the run did not examine, so a short list can never be mistaken for a clean board.
Why the gate matters more than the generator
Generating a plausible circuit is not hard, and that is the problem. Across 115 failed machine-synthesized designs, error rate rose with circuit size at r = 0.863: the bigger the thing you ask for in one go, the more of it is wrong. A generator that answers confidently at any size is not a feature.
So nothing here is synthesized a whole board at a time, nothing is built from a spec that has not cleared its gate, and no part reaches a netlist without its pin numbers having been read out of the manufacturer’s own datasheet and recorded.
What the product shows
Drawn from the same parts the app is built from, with fixed values. It is a specimen, not a record of any project: it shows what the checks look like, not what they found.
| Result | Requirement | Detail |
|---|---|---|
| passed | voltage_out | |
| passed | package | |
| failed | current_max at least 0.5A | got 300mA |
- 1 error finding
- 1 warning
What a finding looks like
Findings are graded, and the grades mean specific things. An error is something that will not work. A warning is something worth an argument. The checker also reports whether it finished at all, separately from what it found, so a run that broke halfway through says so instead of quietly reporting nothing wrong.
U1 pad 2 is on power net ‘VDDA’ which has no cap within 2.00 mm
Eight of the rules in the house pack, chosen for this page:
- decoupling-proximityA cap on the net is not a cap near the pin.
- pin-map-conformanceSymbol pins against the datasheet's own pin table.
- regulator-capsInput and output caps present on each rail.
- floating-pinsStrap and mode pins left to float.
- i2c-pullupsA bus with no pullups on it.
- diff-pairsLength mismatch across a pair.
- power-budgetDraw against what the source can supply.
- footprint-polarity-markThe footprint’s silkscreen polarity mark against the schematic pin name.
Where defects actually are
Shares of 115 failed LLM‑synthesized designs, by category. This is the order the review checklist is worked in, most common first, rather than top‑to‑bottom through the schematic. It is also an honest map of what the rule pack does and does not reach.
| Share | Category | Reached by |
|---|---|---|
| 59% | Wrong supporting components | rules |
| 40% | Wrong interfaces | pin maps |
| 34% | Wrong values | human read |
| 27% | Wrong local topology | human read |
| 23% | Wrong configuration | human read |
Provenance, per part
A pin map is only worth what the document behind it is worth. Every part carries the document number, revision, and hash of the file the pins were read from, fetched from the manufacturer's own domain. Aggregator and reseller mirrors are refused, because a mirror cannot tell you authoritatively which revision you are reading. This document was reissued by the manufacturer under the same revision letter; only the hash changed, which is why the hash is recorded.
- mpn
- TPS61023
- manufacturer
- Texas Instruments
- document
- SLVSF14B rev B revised 2020-08
- url
- ti.com/lit/ds/symlink/tps61023.pdf
- sha256
- 1750450d5e3d7e41a3f6c59be09fa28ccd92d9b47c36fffcc2126298b7f48a52
- retrieved
- 2026-08-31
- pins from
- page 3, “Pin Functions”
What it does not do
A gate that passes everything manufactures false confidence, and so does a page that only lists what a gate catches. These are the limits a first user meets. The service keeps its own limits file, updated in the same change that adds a skip or a waiver, and the checker names what it did not examine at the head of every report.
- It does not simulate. No SPICE, no thermal, no signal integrity. It reads the capture, not the physics.
- A drafted spec is a proposal, not an answer. The first draft of a spec is usually wrong in places, which is why correcting it is a step rather than a courtesy. Nothing is built from it until you have.
- Archive contents are validated inside the job container, not before the queue. A structurally bad upload surfaces as a failed job rather than a specific rejection reason.
- A skip is a claim about where defects are not. Skipping reference prefix D once hid three miswired diodes on a real board. Every exclusion is now stated in the output, so “no findings” cannot be read as “everything was checked.”
Questions engineers ask
What does TestCoupon produce today?
From a sentence describing a board: a draft spec, a block diagram you correct, one part per block, and the passive values around each part solved from that part’s own datasheet, so the bill of materials names a source for every value. Separately, it checks a KiCad revision you upload.
How are parts chosen?
One catalog search per block. Every candidate is checked against the block’s requirements by code, with a tick or a cross per requirement and the reason for every cross.
Where do the component values come from?
From the chosen chip’s own datasheet. A language model finds the design equation and reads the constants, each recorded with its page number. Code solves the equation, rounds to a standard value series and finds an orderable part. The value at the top of this page is one of them.
What does the checker check?
Spec gates, KiCad’s own electrical and design rule checks, house rules for what those miss, and each part’s pin map compared against the pin table in its manufacturer’s datasheet. Every finding names a part, a net and a position on the board, and every report lists what it did not examine.
What does it not do?
It does not simulate: no SPICE, no thermal and no signal integrity analysis.
Can I use it now?
It is in private alpha. Creating an account joins the waitlist, and access is granted by invite.
Why it is called that
A test coupon is a real thing. Board fabricators carry a small extra strip along the edge of every panel, built in the same run as the boards themselves. It gets cut off, sliced through, and measured, so the plating and the drilling can be checked without destroying anything anyone paid for.
It is the part of the panel that exists to be tested instead of trusted. That is the mark above, and it is the whole idea.
Private alpha
Creating an account joins the waitlist. There is no trial to start and nothing to configure yet; access is granted by invite while the rule pack is still being built out.